Software Verification and Validation

Genova Technologies delivers software, system, and PV&V testing for customers in the aerospace and defense, agricultural, education, health, and transportation industries. Our process employs rigorous CMMI methodologies for evaluating correctness and quality of software products throughout the software life cycle, ensuring that the outcome and work product of a project meet formal specifications.

Throughout the process, we refine our understanding, validate our findings, and focus on identifying specific improvements that will make a tangible difference to the project. We also provide project management tools, templates, and sample plans as part of PV&V engagements, and can provide full documentation and artifacts.

Genova provides expertise in safety critical software development and product verification and validation {function level - (call coverage) through condition level - (MC/DC)}; for such standards as: ISO 26262 ASIL D in part 6 (automotive), IEC 61508 SIL 1-4, EN 50128, etc.

Genova delivers the following testing services and artifacts for our clients:

     • White-box testing (unit, regression, integration)
     • Black-box testing (functional, systems, integration, acceptance)
     • Model in loop (MIL)
     • Software in loop (SIL)
     • Processor in loop (PIL)
     • Hardware in loop (HIL)

The Genova Process

Genova has the knowledge and expertise to support your needs in all stages of testing.

If we are designing control systems, we develop the system model and controller (Matlab/Simulink, etc.), and use Model in Loop (MIL) to verify or test whether it is implementable. If we already have the controller model, we then proceed to Software in Loop (SIL).

In SIL, we develop a software/HDL code, depending on the processor or FPGA we plan to use for final hardware implementation, and run simulations for controller models (with the system still as a software model to reduce risk and improve safety) with this code to verify it.

If we experience any glitches, we may have to go back to MIL and make necessary changes. If we have a model which has been tested for SIL already, we proceed to Processor in Loop (PIL).

Once our controller is verified for SIL implementation, we proceed to Processor in Loop (PIL) where we load developed code onto the target processor/FPGA (and usually on the target board hardware, if possible) and run simulations on the modeled system for verification. If there are glitches then we go back to our code, SIL, or MIL and rectify them. If we have an FPGA or a processor ready, we proceed to Hardware in loop (HIL).

Once our system model has been verified using PIL, we can replace the system model with original hardware, such as a lab model or prototype hardware. For example, if the model is a DC motor whose speed controller is being designed, then the controller is in a FPGA/processor, which is now interfaced to the DC motor by connecting the inputs and outputs/states at the right points of sensors/transducers. We now conduct Hardware in Loop (HIL) tests for verification.